Accurate Multiple Input Switching Solution for Static Timing Analysis

Description

The patented solution is to shift the output current values in time for the case of single input switching, accounting for the increase of the miller capacitance in the case of multiple input switching. The current shift solves the delay error but a multiplication factor is, furthermore, required to correct the output voltage transition time from any increase or decrease on the output waveform resulting from the current shift. Hence, the modified current will have the same delay and transition time as the case of multiple input switching for static timing analysis.

Aspects

In the Nanoelectronics industry, verification of a design is required prior to the manufacturing process to ensure that all design parasitic capacitances are accounted for. One of the aspects required for verification is the circuit’s timing which analyzes the timing behavior and the maximum operating frequency of the design. One of the timing analysis tools is the static timing analysis; however, when multiple inputs change simultaneously, a delay error occurs, due to the miller capacitance, under static timing analysis referred to as the history effect. This delay error is often neglected in the industry though its probability of occurring increases with higher operating frequencies.

Patenting Status

Pending

Status

Patented

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